Struct lpc55s6x_pac::usbphy::pll_sic_set::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn misc2_control0(&mut self) -> _MISC2_CONTROL0W

Bit 5 - Modifies the operation of the pll_sic_power_int signal

pub fn pll_en_usb_clks(&mut self) -> _PLL_EN_USB_CLKSW

Bit 6 - Enables the USB clock from PLL to USB PHY

pub fn pll_power(&mut self) -> _PLL_POWERW

Bit 12 - Power up the USB PLL

pub fn pll_enable(&mut self) -> _PLL_ENABLEW

Bit 13 - Enables the clock output from the USB PLL

pub fn pll_bypass(&mut self) -> _PLL_BYPASSW

Bit 16 - Bypass the USB PLL.

pub fn refbias_pwd_sel(&mut self) -> _REFBIAS_PWD_SELW

Bit 19 - Reference bias power down select.

pub fn refbias_pwd(&mut self) -> _REFBIAS_PWDW

Bit 20 - Power down the reference bias This bit is only used when REFBIAS_PWD_SEL is set to 1.

pub fn pll_reg_enable(&mut self) -> _PLL_REG_ENABLEW

Bit 21 - This field controls the USB PLL regulator, set to enable the regulator

pub fn pll_div_sel(&mut self) -> _PLL_DIV_SELW

Bits 22:24 - This field controls the USB PLL feedback loop divider

pub fn pll_lock(&mut self) -> _PLL_LOCKW

Bit 31 - USB PLL lock status indicator