[][src]Struct lpc55s6x_pac::sdif::RegisterBlock

#[repr(C)]
pub struct RegisterBlock { pub ctrl: CTRL, pub pwren: PWREN, pub clkdiv: CLKDIV, pub clkena: CLKENA, pub tmout: TMOUT, pub ctype: CTYPE, pub blksiz: BLKSIZ, pub bytcnt: BYTCNT, pub intmask: INTMASK, pub cmdarg: CMDARG, pub cmd: CMD, pub resp: [RESP; 4], pub mintsts: MINTSTS, pub rintsts: RINTSTS, pub status: STATUS, pub fifoth: FIFOTH, pub cdetect: CDETECT, pub wrtprt: WRTPRT, pub tcbcnt: TCBCNT, pub tbbcnt: TBBCNT, pub debnce: DEBNCE, pub rst_n: RST_N, pub bmod: BMOD, pub pldmnd: PLDMND, pub dbaddr: DBADDR, pub idsts: IDSTS, pub idinten: IDINTEN, pub dscaddr: DSCADDR, pub bufaddr: BUFADDR, pub cardthrctl: CARDTHRCTL, pub backendpwr: BACKENDPWR, pub fifo: [FIFO; 64], // some fields omitted }

Register block

Fields

ctrl: CTRL

0x00 - Control register

pwren: PWREN

0x04 - Power Enable register

clkdiv: CLKDIV

0x08 - Clock Divider register

clkena: CLKENA

0x10 - Clock Enable register

tmout: TMOUT

0x14 - Time-out register

ctype: CTYPE

0x18 - Card Type register

blksiz: BLKSIZ

0x1c - Block Size register

bytcnt: BYTCNT

0x20 - Byte Count register

intmask: INTMASK

0x24 - Interrupt Mask register

cmdarg: CMDARG

0x28 - Command Argument register

cmd: CMD

0x2c - Command register

resp: [RESP; 4]

0x30 - Response register

mintsts: MINTSTS

0x40 - Masked Interrupt Status register

rintsts: RINTSTS

0x44 - Raw Interrupt Status register

status: STATUS

0x48 - Status register

fifoth: FIFOTH

0x4c - FIFO Threshold Watermark register

cdetect: CDETECT

0x50 - Card Detect register

wrtprt: WRTPRT

0x54 - Write Protect register

tcbcnt: TCBCNT

0x5c - Transferred CIU Card Byte Count register

tbbcnt: TBBCNT

0x60 - Transferred Host to BIU-FIFO Byte Count register

debnce: DEBNCE

0x64 - Debounce Count register

rst_n: RST_N

0x78 - Hardware Reset

bmod: BMOD

0x80 - Bus Mode register

pldmnd: PLDMND

0x84 - Poll Demand register

dbaddr: DBADDR

0x88 - Descriptor List Base Address register

idsts: IDSTS

0x8c - Internal DMAC Status register

idinten: IDINTEN

0x90 - Internal DMAC Interrupt Enable register

dscaddr: DSCADDR

0x94 - Current Host Descriptor Address register

bufaddr: BUFADDR

0x98 - Current Buffer Descriptor Address register

cardthrctl: CARDTHRCTL

0x100 - Card Threshold Control

backendpwr: BACKENDPWR

0x104 - Power control

fifo: [FIFO; 64]

0x200 - SDIF FIFO

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock

Blanket Implementations

impl<T> From<T> for T[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Same<T> for T[src]

type Output = T

Should always be Self