[−][src]Struct lpc55s6x_pac::rtc::subsec::R
Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn subsec(&self) -> SUBSECR[src]
Bits 0:14 - A read reflects the current value of the 32Khz sub-second counter. This counter will be cleared whenever the SUBSEC_ENA bit in the RTC_CONTROL register is low. Up-counting at a 32 KHz rate commences at the start of the next one-second interval after the SUBSEC_ENA bit is set. This counter must be re-enabled after exiting deep_powerdown mode or after the main RTC module has been disabled and re-enabled. On modules not equipped with a sub-second counter, this register will read-back as all zeroes.
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