[−][src]Enum lpc55s6x_pac::prince::lock::LOCKREG1R
Possible values of the field LOCKREG1
Variants
DISABLED
Disabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are writable..
ENABLED
Enabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are not writable..
Methods
impl LOCKREG1R
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pub fn bit_is_clear(&self) -> bool
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Returns true
if the bit is clear (0)
pub fn bit_is_set(&self) -> bool
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Returns true
if the bit is set (1)
pub fn bit(&self) -> bool
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Value of the field as raw bits
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
Trait Implementations
impl PartialEq<LOCKREG1R> for LOCKREG1R
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impl Copy for LOCKREG1R
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impl Debug for LOCKREG1R
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impl Clone for LOCKREG1R
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Auto Trait Implementations
Blanket Implementations
impl<T> From<T> for T
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impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Same<T> for T
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type Output = T
Should always be Self