[−][src]Crate lpc55s6x_pac
Peripheral access API for LPC55S69_CM33_CORE0 microcontrollers (generated using svd2rust v0.14.0)
You can find an overview of the API here.
Modules
| adc0 | ADC |
| ahb_secure_ctrl | AHB secure controller |
| anactrl | ANALOGCTRL |
| casper | CASPER |
| crc_engine | CRC engine |
| ctimer0 | Standard counter/timers (CTIMER0 to 4) |
| dgbmailbox | MCU Debugger Mailbox |
| dma0 | DMA controller |
| flash | FLASH |
| flash_cfpa0 | FLASH_CFPA |
| flash_cmpa | FLASH_CMPA |
| flash_key_store | FLASH_KEY_STORE |
| flexcomm0 | Flexcomm serial communication |
| gint0 | Group GPIO input interrupt (GINT0/1) |
| gpio | General Purpose I/O (GPIO) |
| hashcrypt | Hash-Crypt peripheral |
| i2c0 | I2C-bus interfaces |
| i2s0 | I2S interface |
| inputmux | Input multiplexing (INPUT MUX) |
| iocon | I/O pin configuration (IOCON) |
| mailbox | Mailbox |
| mrt0 | Multi-Rate Timer (MRT) |
| ostimer | Synchronous OS/Event timer with Wakeup Timer |
| pint | Pin interrupt and pattern match (PINT) |
| plu | LPC80X Programmable Logic Unit (PLU) |
| pmc | PMC |
| powerquad | Digital Signal Co-Processing companion to a Cortex-M v8M CPU core |
| prince | PRINCE |
| puf | PUFCTRL |
| rng | RNG |
| rtc | Real-Time Clock (RTC) |
| sau | no description available |
| scn_scb | no description available |
| sct0 | SCTimer/PWM (SCT) |
| sdif | SDMMC |
| spi0 | Serial Peripheral Interfaces (SPI) |
| syscon | SYSCON |
| sysctl | system controller |
| usart0 | USARTs |
| usb0 | USB 2.0 Device Controller |
| usbfsh | USB0 Full-speed Host controller |
| usbhsd | USB1 High-speed Device Controller |
| usbhsh | USB1 High-speed Host Controller |
| usbphy | Universal System Bus Physical Layer |
| utick0 | Micro-tick Timer (UTICK) |
| wwdt | Windowed Watchdog Timer (WWDT) |
Structs
| ADC0 | ADC |
| AHB_SECURE_CTRL | AHB secure controller |
| ANACTRL | ANALOGCTRL |
| CASPER | CASPER |
| CBP | Cache and branch predictor maintenance operations |
| CPUID | CPUID |
| CRC_ENGINE | CRC engine |
| CTIMER0 | Standard counter/timers (CTIMER0 to 4) |
| CTIMER1 | Standard counter/timers (CTIMER0 to 4) |
| CTIMER2 | Standard counter/timers (CTIMER0 to 4) |
| CTIMER3 | Standard counter/timers (CTIMER0 to 4) |
| CTIMER4 | Standard counter/timers (CTIMER0 to 4) |
| CorePeripherals | Core peripherals |
| DCB | Debug Control Block |
| DGBMAILBOX | MCU Debugger Mailbox |
| DMA0 | DMA controller |
| DMA1 | DMA controller |
| DWT | Data Watchpoint and Trace unit |
| FLASH | FLASH |
| FLASH_CFPA0 | FLASH_CFPA |
| FLASH_CFPA1 | FLASH_CFPA |
| FLASH_CFPA_SCRATCH | FLASH_CFPA |
| FLASH_CMPA | FLASH_CMPA |
| FLASH_KEY_STORE | FLASH_KEY_STORE |
| FLEXCOMM0 | Flexcomm serial communication |
| FLEXCOMM1 | Flexcomm serial communication |
| FLEXCOMM2 | Flexcomm serial communication |
| FLEXCOMM3 | Flexcomm serial communication |
| FLEXCOMM4 | Flexcomm serial communication |
| FLEXCOMM5 | Flexcomm serial communication |
| FLEXCOMM6 | Flexcomm serial communication |
| FLEXCOMM7 | Flexcomm serial communication |
| FLEXCOMM8 | Flexcomm serial communication |
| FPB | Flash Patch and Breakpoint unit |
| FPU | Floating Point Unit |
| GINT0 | Group GPIO input interrupt (GINT0/1) |
| GINT1 | Group GPIO input interrupt (GINT0/1) |
| GPIO | General Purpose I/O (GPIO) |
| HASHCRYPT | Hash-Crypt peripheral |
| I2C0 | I2C-bus interfaces |
| I2C1 | I2C-bus interfaces |
| I2C2 | I2C-bus interfaces |
| I2C3 | I2C-bus interfaces |
| I2C4 | I2C-bus interfaces |
| I2C5 | I2C-bus interfaces |
| I2C6 | I2C-bus interfaces |
| I2C7 | I2C-bus interfaces |
| I2S0 | I2S interface |
| I2S1 | I2S interface |
| I2S2 | I2S interface |
| I2S3 | I2S interface |
| I2S4 | I2S interface |
| I2S5 | I2S interface |
| I2S6 | I2S interface |
| I2S7 | I2S interface |
| INPUTMUX | Input multiplexing (INPUT MUX) |
| IOCON | I/O pin configuration (IOCON) |
| ITM | Instrumentation Trace Macrocell |
| MAILBOX | Mailbox |
| MPU | Memory Protection Unit |
| MRT0 | Multi-Rate Timer (MRT) |
| NVIC | Nested Vector Interrupt Controller |
| OSTIMER | Synchronous OS/Event timer with Wakeup Timer |
| PINT | Pin interrupt and pattern match (PINT) |
| PLU | LPC80X Programmable Logic Unit (PLU) |
| PMC | PMC |
| POWERQUAD | Digital Signal Co-Processing companion to a Cortex-M v8M CPU core |
| PRINCE | PRINCE |
| PUF | PUFCTRL |
| Peripherals | All the peripherals |
| RNG | RNG |
| RTC | Real-Time Clock (RTC) |
| SAU | no description available |
| SCB | System Control Block |
| SCNSCB | no description available |
| SCT0 | SCTimer/PWM (SCT) |
| SDIF | SDMMC |
| SECGPIO | General Purpose I/O (GPIO) |
| SECPINT | Pin interrupt and pattern match (PINT) |
| SPI0 | Serial Peripheral Interfaces (SPI) |
| SPI1 | Serial Peripheral Interfaces (SPI) |
| SPI2 | Serial Peripheral Interfaces (SPI) |
| SPI3 | Serial Peripheral Interfaces (SPI) |
| SPI4 | Serial Peripheral Interfaces (SPI) |
| SPI5 | Serial Peripheral Interfaces (SPI) |
| SPI6 | Serial Peripheral Interfaces (SPI) |
| SPI7 | Serial Peripheral Interfaces (SPI) |
| SPI8 | Serial Peripheral Interfaces (SPI) |
| SYSCON | SYSCON |
| SYSCTL | system controller |
| SYST | SysTick: System Timer |
| TPIU | Trace Port Interface Unit |
| USART0 | USARTs |
| USART1 | USARTs |
| USART2 | USARTs |
| USART3 | USARTs |
| USART4 | USARTs |
| USART5 | USARTs |
| USART6 | USARTs |
| USART7 | USARTs |
| USB0 | USB 2.0 Device Controller |
| USBFSH | USB0 Full-speed Host controller |
| USBHSD | USB1 High-speed Device Controller |
| USBHSH | USB1 High-speed Host Controller |
| USBPHY | Universal System Bus Physical Layer |
| UTICK0 | Micro-tick Timer (UTICK) |
| WWDT | Windowed Watchdog Timer (WWDT) |
Enums
| Interrupt | Enumeration of all the interrupts |
Constants
| NVIC_PRIO_BITS | Number available in the NVIC for configuring priority |