[−][src]Enum lpc55s6x_pac::i2s0::cfg1::MODEW
Values that can be written to the field MODE
Variants
CLASSIC_MODE
I2S mode a.k.a. 'classic' mode. WS has a 50% duty cycle, with (for each enabled channel pair) one piece of left channel data occurring during the first phase, and one pieces of right channel data occurring during the second phase. In this mode, the data region begins one clock after the leading WS edge for the frame. For a 50% WS duty cycle, FRAMELEN must define an even number of I2S clocks for the frame. If FRAMELEN defines an odd number of clocks per frame, the extra clock will occur on the right.
DSP_MODE_WS_50_DUTYCYCLE
DSP mode where WS has a 50% duty cycle. See remark for mode 0.
DSP_MODE_WS_1_CLOCK
DSP mode where WS has a one clock long pulse at the beginning of each data frame.
DSP_MODE_WS_1_DATA
DSP mode where WS has a one data slot long pulse at the beginning of each data frame.
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