[][src]Struct lpc55s6x_pac::ctimer0::ccr::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W[src]

pub fn reset_value() -> W[src]

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]

Writes raw bits to the register

pub fn cap0re(&mut self) -> _CAP0REW[src]

Bit 0 - Rising edge of capture channel 0: a sequence of 0 then 1 causes CR0 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap0fe(&mut self) -> _CAP0FEW[src]

Bit 1 - Falling edge of capture channel 0: a sequence of 1 then 0 causes CR0 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap0i(&mut self) -> _CAP0IW[src]

Bit 2 - Generate interrupt on channel 0 capture event: a CR0 load generates an interrupt.

pub fn cap1re(&mut self) -> _CAP1REW[src]

Bit 3 - Rising edge of capture channel 1: a sequence of 0 then 1 causes CR1 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap1fe(&mut self) -> _CAP1FEW[src]

Bit 4 - Falling edge of capture channel 1: a sequence of 1 then 0 causes CR1 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap1i(&mut self) -> _CAP1IW[src]

Bit 5 - Generate interrupt on channel 1 capture event: a CR1 load generates an interrupt.

pub fn cap2re(&mut self) -> _CAP2REW[src]

Bit 6 - Rising edge of capture channel 2: a sequence of 0 then 1 causes CR2 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap2fe(&mut self) -> _CAP2FEW[src]

Bit 7 - Falling edge of capture channel 2: a sequence of 1 then 0 causes CR2 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap2i(&mut self) -> _CAP2IW[src]

Bit 8 - Generate interrupt on channel 2 capture event: a CR2 load generates an interrupt.

pub fn cap3re(&mut self) -> _CAP3REW[src]

Bit 9 - Rising edge of capture channel 3: a sequence of 0 then 1 causes CR3 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap3fe(&mut self) -> _CAP3FEW[src]

Bit 10 - Falling edge of capture channel 3: a sequence of 1 then 0 causes CR3 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap3i(&mut self) -> _CAP3IW[src]

Bit 11 - Generate interrupt on channel 3 capture event: a CR3 load generates an interrupt.

Auto Trait Implementations

impl Send for W

impl Sync for W

Blanket Implementations

impl<T> From<T> for T[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same<T> for T[src]

type Output = T

Should always be Self