[−][src]Enum lpc55s6x_pac::anactrl::fro192m_status::CLK_VALIDR
Possible values of the field CLK_VALID
Variants
NOCLKOUT
No output clock present (None of 12 MHz, 48 MHz or 96 MHz clock is available).
CLKOUT
Clock is present (12 MHz, 48 MHz or 96 MHz can be output if they are enable respectively by FRO192M_CTRL.ENA_12MHZCLK/ENA_48MHZCLK/ENA_96MHZCLK).
Methods
impl CLK_VALIDR
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pub fn bit_is_clear(&self) -> bool
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Returns true
if the bit is clear (0)
pub fn bit_is_set(&self) -> bool
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Returns true
if the bit is set (1)
pub fn bit(&self) -> bool
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Value of the field as raw bits
pub fn is_noclkout(&self) -> bool
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Checks if the value of the field is NOCLKOUT
pub fn is_clkout(&self) -> bool
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Checks if the value of the field is CLKOUT
Trait Implementations
impl PartialEq<CLK_VALIDR> for CLK_VALIDR
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impl Copy for CLK_VALIDR
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impl Debug for CLK_VALIDR
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impl Clone for CLK_VALIDR
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Auto Trait Implementations
impl Send for CLK_VALIDR
impl Sync for CLK_VALIDR
Blanket Implementations
impl<T> From<T> for T
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impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Same<T> for T
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type Output = T
Should always be Self