Struct lpc55s6x_pac::ahb_secure_ctrl::sec_cpu_int_mask1::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn gpio_int0_irq4(&self) -> GPIO_INT0_IRQ4R

Bit 0 - Pin interrupt 4 or pattern match engine slice 4 interrupt.

pub fn gpio_int0_irq5(&self) -> GPIO_INT0_IRQ5R

Bit 1 - Pin interrupt 5 or pattern match engine slice 5 interrupt.

pub fn gpio_int0_irq6(&self) -> GPIO_INT0_IRQ6R

Bit 2 - Pin interrupt 6 or pattern match engine slice 6 interrupt.

pub fn gpio_int0_irq7(&self) -> GPIO_INT0_IRQ7R

Bit 3 - Pin interrupt 7 or pattern match engine slice 7 interrupt.

pub fn ctimer2_irq(&self) -> CTIMER2_IRQR

Bit 4 - Standard counter/timer 2 interrupt.

pub fn ctimer4_irq(&self) -> CTIMER4_IRQR

Bit 5 - Standard counter/timer 4 interrupt.

pub fn os_event_timer_irq(&self) -> OS_EVENT_TIMER_IRQR

Bit 6 - OS Event Timer and OS Event Timer Wakeup interrupts

pub fn reserved0(&self) -> RESERVED0R

Bit 7 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved1(&self) -> RESERVED1R

Bit 8 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved2(&self) -> RESERVED2R

Bit 9 - Reserved. Read value is undefined, only zero should be written.

pub fn sdio_irq(&self) -> SDIO_IRQR

Bit 10 - SDIO Controller interrupt.

pub fn reserved3(&self) -> RESERVED3R

Bit 11 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved4(&self) -> RESERVED4R

Bit 12 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved5(&self) -> RESERVED5R

Bit 13 - Reserved. Read value is undefined, only zero should be written.

pub fn usb1_utmi_irq(&self) -> USB1_UTMI_IRQR

Bit 14 - USB High Speed Controller UTMI interrupt.

pub fn usb1_irq(&self) -> USB1_IRQR

Bit 15 - USB High Speed Controller interrupt.

pub fn usb1_needclk(&self) -> USB1_NEEDCLKR

Bit 16 - USB High Speed Controller Clock request interrupt.

pub fn sec_hypervisor_call_irq(&self) -> SEC_HYPERVISOR_CALL_IRQR

Bit 17 - Secure fault Hyper Visor call interrupt.

pub fn sec_gpio_int0_irq0(&self) -> SEC_GPIO_INT0_IRQ0R

Bit 18 - Secure Pin interrupt 0 or pattern match engine slice 0 interrupt.

pub fn sec_gpio_int0_irq1(&self) -> SEC_GPIO_INT0_IRQ1R

Bit 19 - Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.

pub fn plu_irq(&self) -> PLU_IRQR

Bit 20 - Programmable Look-Up Controller interrupt.

pub fn sec_vio_irq(&self) -> SEC_VIO_IRQR

Bit 21 - Security Violation interrupt.

pub fn sha_irq(&self) -> SHA_IRQR

Bit 22 - HASH-AES interrupt.

pub fn casper_irq(&self) -> CASPER_IRQR

Bit 23 - CASPER interrupt.

pub fn qddkey_irq(&self) -> QDDKEY_IRQR

Bit 24 - PUF interrupt.

pub fn pq_irq(&self) -> PQ_IRQR

Bit 25 - Power Quad interrupt.

pub fn sdma1_irq(&self) -> SDMA1_IRQR

Bit 26 - System DMA 1 (Secure) interrupt

pub fn lspi_hs_irq(&self) -> LSPI_HS_IRQR

Bit 27 - High Speed SPI interrupt