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#[doc = r" Value read from the register"] pub struct R { bits: u32, } #[doc = r" Value to write to the register"] pub struct W { bits: u32, } impl super::MOD { #[doc = r" Modifies the contents of the register"] #[inline] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); let r = R { bits: bits }; let mut w = W { bits: bits }; f(&r, &mut w); self.register.set(w.bits); } #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r" Writes to the register"] #[inline] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { let mut w = W::reset_value(); f(&mut w); self.register.set(w.bits); } #[doc = r" Writes the reset value to the register"] #[inline] pub fn reset(&self) { self.write(|w| w) } } #[doc = "Possible values of the field `WDEN`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum WDENR { #[doc = "Stop. The watchdog timer is stopped."] STOP, #[doc = "Run. The watchdog timer is running."] RUN, } impl WDENR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { WDENR::STOP => false, WDENR::RUN => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> WDENR { match value { false => WDENR::STOP, true => WDENR::RUN, } } #[doc = "Checks if the value of the field is `STOP`"] #[inline] pub fn is_stop(&self) -> bool { *self == WDENR::STOP } #[doc = "Checks if the value of the field is `RUN`"] #[inline] pub fn is_run(&self) -> bool { *self == WDENR::RUN } } #[doc = "Possible values of the field `WDRESET`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum WDRESETR { #[doc = "Interrupt. A watchdog time-out will not cause a chip reset."] INTERRUPT, #[doc = "Reset. A watchdog time-out will cause a chip reset."] RESET, } impl WDRESETR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { WDRESETR::INTERRUPT => false, WDRESETR::RESET => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> WDRESETR { match value { false => WDRESETR::INTERRUPT, true => WDRESETR::RESET, } } #[doc = "Checks if the value of the field is `INTERRUPT`"] #[inline] pub fn is_interrupt(&self) -> bool { *self == WDRESETR::INTERRUPT } #[doc = "Checks if the value of the field is `RESET`"] #[inline] pub fn is_reset(&self) -> bool { *self == WDRESETR::RESET } } #[doc = r" Value of the field"] pub struct WDTOFR { bits: bool, } impl WDTOFR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct WDINTR { bits: bool, } impl WDINTR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = "Possible values of the field `WDPROTECT`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum WDPROTECTR { #[doc = "Flexible. The watchdog time-out value (TC) can be changed at any time."] FLEXIBLE, #[doc = "Threshold. The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW."] THRESHOLD, } impl WDPROTECTR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { WDPROTECTR::FLEXIBLE => false, WDPROTECTR::THRESHOLD => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> WDPROTECTR { match value { false => WDPROTECTR::FLEXIBLE, true => WDPROTECTR::THRESHOLD, } } #[doc = "Checks if the value of the field is `FLEXIBLE`"] #[inline] pub fn is_flexible(&self) -> bool { *self == WDPROTECTR::FLEXIBLE } #[doc = "Checks if the value of the field is `THRESHOLD`"] #[inline] pub fn is_threshold(&self) -> bool { *self == WDPROTECTR::THRESHOLD } } #[doc = "Values that can be written to the field `WDEN`"] pub enum WDENW { #[doc = "Stop. The watchdog timer is stopped."] STOP, #[doc = "Run. The watchdog timer is running."] RUN, } impl WDENW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { WDENW::STOP => false, WDENW::RUN => true, } } } #[doc = r" Proxy"] pub struct _WDENW<'a> { w: &'a mut W, } impl<'a> _WDENW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: WDENW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Stop. The watchdog timer is stopped."] #[inline] pub fn stop(self) -> &'a mut W { self.variant(WDENW::STOP) } #[doc = "Run. The watchdog timer is running."] #[inline] pub fn run(self) -> &'a mut W { self.variant(WDENW::RUN) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 0; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `WDRESET`"] pub enum WDRESETW { #[doc = "Interrupt. A watchdog time-out will not cause a chip reset."] INTERRUPT, #[doc = "Reset. A watchdog time-out will cause a chip reset."] RESET, } impl WDRESETW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { WDRESETW::INTERRUPT => false, WDRESETW::RESET => true, } } } #[doc = r" Proxy"] pub struct _WDRESETW<'a> { w: &'a mut W, } impl<'a> _WDRESETW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: WDRESETW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Interrupt. A watchdog time-out will not cause a chip reset."] #[inline] pub fn interrupt(self) -> &'a mut W { self.variant(WDRESETW::INTERRUPT) } #[doc = "Reset. A watchdog time-out will cause a chip reset."] #[inline] pub fn reset(self) -> &'a mut W { self.variant(WDRESETW::RESET) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 1; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _WDTOFW<'a> { w: &'a mut W, } impl<'a> _WDTOFW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 2; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _WDINTW<'a> { w: &'a mut W, } impl<'a> _WDINTW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 3; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `WDPROTECT`"] pub enum WDPROTECTW { #[doc = "Flexible. The watchdog time-out value (TC) can be changed at any time."] FLEXIBLE, #[doc = "Threshold. The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW."] THRESHOLD, } impl WDPROTECTW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { WDPROTECTW::FLEXIBLE => false, WDPROTECTW::THRESHOLD => true, } } } #[doc = r" Proxy"] pub struct _WDPROTECTW<'a> { w: &'a mut W, } impl<'a> _WDPROTECTW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: WDPROTECTW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Flexible. The watchdog time-out value (TC) can be changed at any time."] #[inline] pub fn flexible(self) -> &'a mut W { self.variant(WDPROTECTW::FLEXIBLE) } #[doc = "Threshold. The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW."] #[inline] pub fn threshold(self) -> &'a mut W { self.variant(WDPROTECTW::THRESHOLD) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 4; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 0 - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently."] #[inline] pub fn wden(&self) -> WDENR { WDENR::_from({ const MASK: bool = true; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u32) != 0 }) } #[doc = "Bit 1 - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0."] #[inline] pub fn wdreset(&self) -> WDRESETR { WDRESETR::_from({ const MASK: bool = true; const OFFSET: u8 = 1; ((self.bits >> OFFSET) & MASK as u32) != 0 }) } #[doc = "Bit 2 - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1."] #[inline] pub fn wdtof(&self) -> WDTOFR { let bits = { const MASK: bool = true; const OFFSET: u8 = 2; ((self.bits >> OFFSET) & MASK as u32) != 0 }; WDTOFR { bits } } #[doc = "Bit 3 - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0."] #[inline] pub fn wdint(&self) -> WDINTR { let bits = { const MASK: bool = true; const OFFSET: u8 = 3; ((self.bits >> OFFSET) & MASK as u32) != 0 }; WDINTR { bits } } #[doc = "Bit 4 - Watchdog update mode. This bit can be set once by software and is only cleared by a reset."] #[inline] pub fn wdprotect(&self) -> WDPROTECTR { WDPROTECTR::_from({ const MASK: bool = true; const OFFSET: u8 = 4; ((self.bits >> OFFSET) & MASK as u32) != 0 }) } } impl W { #[doc = r" Reset value of the register"] #[inline] pub fn reset_value() -> W { W { bits: 0 } } #[doc = r" Writes raw bits to the register"] #[inline] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently."] #[inline] pub fn wden(&mut self) -> _WDENW { _WDENW { w: self } } #[doc = "Bit 1 - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0."] #[inline] pub fn wdreset(&mut self) -> _WDRESETW { _WDRESETW { w: self } } #[doc = "Bit 2 - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1."] #[inline] pub fn wdtof(&mut self) -> _WDTOFW { _WDTOFW { w: self } } #[doc = "Bit 3 - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0."] #[inline] pub fn wdint(&mut self) -> _WDINTW { _WDINTW { w: self } } #[doc = "Bit 4 - Watchdog update mode. This bit can be set once by software and is only cleared by a reset."] #[inline] pub fn wdprotect(&mut self) -> _WDPROTECTW { _WDPROTECTW { w: self } } }