[−][src]Module lpc55s6x_pac::usart0::intenset
Interrupt Enable read and Set register for USART (not FIFO) status. Contains individual interrupt enable bits for each potential USART interrupt. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.
Structs
| ABERRENR | Value of the field |
| DELTACTSENR | Value of the field |
| DELTARXBRKENR | Value of the field |
| FRAMERRENR | Value of the field |
| PARITYERRENR | Value of the field |
| R | Value read from the register |
| RXNOISEENR | Value of the field |
| STARTENR | Value of the field |
| TXDISENR | Value of the field |
| TXIDLEENR | Value of the field |
| W | Value to write to the register |
| _ABERRENW | Proxy |
| _DELTACTSENW | Proxy |
| _DELTARXBRKENW | Proxy |
| _FRAMERRENW | Proxy |
| _PARITYERRENW | Proxy |
| _RXNOISEENW | Proxy |
| _STARTENW | Proxy |
| _TXDISENW | Proxy |
| _TXIDLEENW | Proxy |