Module lpc55s6x_pac::usart0::intenclr

Interrupt Enable Clear register. Allows clearing any combination of bits in the INTENSET register. Writing a 1 to any implemented bit position causes the corresponding bit to be cleared.

Structs

W	Value to write to the register
_ABERRCLRW	Proxy
_DELTACTSCLRW	Proxy
_DELTARXBRKCLRW	Proxy
_FRAMERRCLRW	Proxy
_PARITYERRCLRW	Proxy
_RXNOISECLRW	Proxy
_STARTCLRW	Proxy
_TXDISCLRW	Proxy
_TXIDLECLRW	Proxy