Struct lpc55s6x_pac::syscon::pll1stat::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn lock(&self) -> LOCKR

Bit 0 - lock detector output (active high) Warning: The lock signal is only reliable between fref[2] :100 kHz to 20 MHz.

pub fn predivack(&self) -> PREDIVACKR

Bit 1 - pre-divider ratio change acknowledge.

pub fn feeddivack(&self) -> FEEDDIVACKR

Bit 2 - feedback divider ratio change acknowledge.

pub fn postdivack(&self) -> POSTDIVACKR

Bit 3 - post-divider ratio change acknowledge.

pub fn frmdet(&self) -> FRMDETR

Bit 4 - free running detector output (active high).