Struct lpc55s6x_pac::syscon::pll1ctrl::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn selr(&mut self) -> _SELRW

Bits 0:3 - Bandwidth select R value.

pub fn seli(&mut self) -> _SELIW

Bits 4:9 - Bandwidth select I value.

pub fn selp(&mut self) -> _SELPW

Bits 10:14 - Bandwidth select P value.

pub fn bypasspll(&mut self) -> _BYPASSPLLW

Bit 15 - Bypass PLL input clock is sent directly to the PLL output (default).

pub fn bypasspostdiv2(&mut self) -> _BYPASSPOSTDIV2W

Bit 16 - bypass of the divide-by-2 divider in the post-divider.

pub fn limupoff(&mut self) -> _LIMUPOFFW

Bit 17 - limup_off = 1 in spread spectrum and fractional PLL applications.

pub fn bwdirect(&mut self) -> _BWDIRECTW

Bit 18 - control of the bandwidth of the PLL.

pub fn bypassprediv(&mut self) -> _BYPASSPREDIVW

Bit 19 - bypass of the pre-divider.

pub fn bypasspostdiv(&mut self) -> _BYPASSPOSTDIVW

Bit 20 - bypass of the post-divider.

pub fn clken(&mut self) -> _CLKENW

Bit 21 - enable the output clock.

pub fn frmen(&mut self) -> _FRMENW

Bit 22 - 1: free running mode.

pub fn frmclkstable(&mut self) -> _FRMCLKSTABLEW

Bit 23 - free running mode clockstable: Warning: Only make frm_clockstable = 1 after the PLL output frequency is stable.

pub fn skewen(&mut self) -> _SKEWENW

Bit 24 - Skew mode.