[−][src]Module lpc55s6x_pac::spi0::intenclr
SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.
Structs
| W | Value to write to the register |
| _MSTIDLEW | Proxy |
| _SSAENW | Proxy |
| _SSDENW | Proxy |