[−][src]Struct lpc55s6x_pac::sct0::dma1request::W
Value to write to the register
Methods
impl W
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pub fn reset_value() -> W
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Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register
pub fn dev_1(&mut self) -> _DEV_1W
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Bits 0:15 - If bit n is one, event n triggers DMA request 1 (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of events in this SCT.
pub fn drl1(&mut self) -> _DRL1W
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Bit 30 - A 1 in this bit triggers DMA request 1 when it loads the Match L/Unified registers from the Reload L/Unified registers.
pub fn drq1(&mut self) -> _DRQ1W
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Bit 31 - This read-only bit indicates the state of DMA Request 1. Note that if the related DMA channel is enabled and properly set up, it is unlikely that software will see this flag, it will be cleared rapidly by the DMA service. The flag remaining set could point to an issue with DMA setup.
Auto Trait Implementations
Blanket Implementations
impl<T> From<T> for T
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impl<T, U> TryFrom<U> for T where
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U: Into<T>,
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U: TryFrom<T>,
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impl<T> Borrow<T> for T where
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